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Error-Compensated Integrate and HoldDifferencing circuit cancels error caused by switching transistors capacitance. In integrate and hold circuit using JFET switch, gate-to-source capacitance causes error in output voltage. Differential connection cancels out error. Applications in systems where very low voltages sampled or many integrate-and -hold cycles before circuit is reset.
Document ID
19830000255
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Matlin, M.
Date Acquired
August 11, 2013
Publication Date
April 1, 1984
Publication Information
Publication: NASA Tech Briefs
Volume: 8
Issue: 1
ISSN: 0145-319X
Subject Category
Electronic Components And Circuits
Report/Patent Number
ARC-11303
Accession Number
83B10255
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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