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Portable design rules for bulk CMOSIt is pointed out that for the past several years, one school of IC designers has used a simplified set of nMOS geometric design rules (GDR) which is 'portable', in that it can be used by many different nMOS manufacturers. The present investigation is concerned with a preliminary set of design rules for bulk CMOS which has been verified for simple test structures. The GDR are defined in terms of Caltech Intermediate Form (CIF), which is a geometry-description language that defines simple geometrical objects in layers. The layers are abstractions of physical mask layers. The design rules do not presume the existence of any particular design methodology. Attention is given to p-well and n-well CMOS processes, bulk CMOS and CMOS-SOS, CMOS geometric rules, and a description of the advantages of CMOS technology.
Document ID
19830046932
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
Authors
Griswold, T. W.
(California Institute of Technology, Jet Propulsion Laboratory, Pasadena CA, United States)
Date Acquired
August 11, 2013
Publication Date
January 1, 1982
Publication Information
Publication: VLSI Design
Subject Category
Electronics And Electrical Engineering
Accession Number
83A28150
Distribution Limits
Public
Copyright
Other

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