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Asynchronous Communication Scheme For Hypercube ComputerScheme devised for asynchronous-message communication system for Mark III hypercube concurrent-processor network. Network consists of up to 1,024 processing elements connected electrically as though were at corners of 10-dimensional cube. Each node contains two Motorola 68020 processors along with Motorola 68881 floating-point processor utilizing up to 4 megabytes of shared dynamic random-access memory. Scheme intended to support applications requiring passage of both polled or solicited and unsolicited messages.
Document ID
19880000403
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Madan, Herb S.
(Caltech)
Date Acquired
August 13, 2013
Publication Date
September 1, 1988
Publication Information
Publication: NASA Tech Briefs
Volume: 12
Issue: 8
ISSN: 0145-319X
Subject Category
Electronic Systems
Report/Patent Number
NPO-16860
Accession Number
88B10403
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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