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Efficient Ada multitasking on a RISC register window architectureThis work addresses the problem of reducing context switch overhead on a processor which supports a large register file - a register file much like that which is part of the Berkeley RISC processors and several other emerging architectures (which are not necessarily reduced instruction set machines in the purest sense). Such a reduction in overhead is particularly desirable in a real-time embedded application, in which task-to-task context switch overhead may result in failure to meet crucial deadlines. A storage management technique by which a context switch may be implemented as cheaply as a procedure call is presented. The essence of this technique is the avoidance of the save/restore of registers on the context switch. This is achieved through analysis of the static source text of an Ada tasking program. Information gained during that analysis directs the optimized storage management strategy for that program at run time. A formal verification of the technique in terms of an operational control model and an evaluation of the technique's performance via simulations driven by synthetic Ada program traces are presented.
Document ID
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Kearns, J. P.
(College of William and Mary Williamsburg, VA, United States)
Quammen, D.
(George Mason University Fairfax, VA, United States)
Date Acquired
August 13, 2013
Publication Date
January 1, 1987
Subject Category
Computer Programming And Software
Report/Patent Number
AIAA PAPER 87-2782
Meeting Information
Meeting: AIAA Computers in Aerospace Conference
Location: Wakefield, MA
Country: United States
Start Date: October 7, 1987
End Date: October 9, 1987
Accession Number
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