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Experimental evidence for a new single-event upset (SEU) mode in a CMOS SRAM obtained from model verificationModeling of SEU has been done in a CMOS static RAM containing 1-micron-channel-length transistors fabricated from a p-well epilayer process using both circuit-simulation and numerical-simulation techniques. The modeling results have been experimentally verified with the aid of heavy-ion beams obtained from a three-stage tandem van de Graaff accelerator. Experimental evidence for a novel SEU mode in an ON n-channel device is presented.
Document ID
19880038161
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
Authors
Zoutendyk, J. A.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Smith, L. S.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Soli, G. A.
(California Institute of Technology Jet Propulsion Laboratory, Pasadena, United States)
Lo, R. Y.
(Intel Corp. Santa Clara, CA, United States)
Date Acquired
August 13, 2013
Publication Date
December 1, 1987
Publication Information
Publication: IEEE Transactions on Nuclear Science
Volume: NS-34
ISSN: 0018-9499
Subject Category
Electronics And Electrical Engineering
Accession Number
88A25388
Distribution Limits
Public
Copyright
Other

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