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The design of an onboard digital Doppler processor for a spaceborne scatterometerA digital Doppler processor, which will permit the Doppler center frequency of the measurement cell bandwidths to be adjusted to compensate for the effects of the earth's rotation, will be used in the next NASA spaceborn scatterometer known as NSCAT. The authors describe the design and genesis of the NSCAT digital Doppler processor and discusses the performance tradeoff issues that were evaluated during the design phase. In this FFT (fast Fourier transform)-based technique, computation of the adjustment to the cell center frequencies will be done onboard using an approximate expression for the Doppler shift of the cell center versus orbit time. This technique also permits modification of the parameters used to locate the radar-backscatter-coefficient measurement cells by ground command in response to orbit changes.
Document ID
19890028553
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
External Source(s)
Authors
Long, David G.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Chi, Chong-Yung
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Li, Fuk K.
(California Institute of Technology Jet Propulsion Laboratory, Pasadena, United States)
Date Acquired
August 14, 2013
Publication Date
November 1, 1988
Publication Information
Publication: IEEE Transactions on Geoscience and Remote Sensing
Volume: 26
ISSN: 0196-2892
Subject Category
Spacecraft Instrumentation
Accession Number
89A15924
Distribution Limits
Public
Copyright
Other

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