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BLITZEN - A highly integrated massively parallel machineThe architecture and VLSI design of a new massively parallel processing array chip are described. The BLITZEN processing element array chip, which contains 1.1 million transistors, serves as the basis for a highly integrated, miniaturized, high-performance, massively parallel machine that is currently under development. Each processing element has 1K bits of static RAM and performs bit-serial processing with functional elements for arithmetic, logic, and shifting.
Document ID
19890044945
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Blevins, D. W. (Microelectronics Center of North Carolina Research Triangle Park, NC, United States)
Davis, E. W. (Microelectronics Center of North Carolina Research Triangle Park, NC, United States)
Heaton, R. A. (Microelectronics Center of North Carolina Research Triangle Park, NC, United States)
Reif, J. H. (North Carolina, Microelectronics Center Research Triangle Park, United States)
Date Acquired
August 14, 2013
Publication Date
October 1, 1988
Subject Category
Computer Systems
Accession Number
89A32316
Funding Number(s)
CONTRACT_GRANT: NSF CCR-86-96134
CONTRACT_GRANT: N00014-88-K-0458
CONTRACT_GRANT: AF-AFOSR-87-0386
CONTRACT_GRANT: DAAL03-88-K-0195
CONTRACT_GRANT: NAG5-966
CONTRACT_GRANT: N00014-87-K-0310
CONTRACT_GRANT: N00014-80-C-0647
Distribution Limits
Public
Copyright
Other

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