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Record 9 of 12613
A VLSI design for computing exponentiations in GF(2m) and its application to generate pseudorandom number sequences
External Online Source: doi:10.1109/12.45211
Author and Affiliation:
Wang, Charles C.(JPL, Pasadena, CA, United States)
Pei, Dingyi(Chinese Academy of Sciences, Institute of Applied Mathematics, Beijing, People's Republic of China, United States)
Abstract: A VLSI design for computing exponentiation in finite fields is developed. An algorithm to generate a relatively long pseudorandom number sequence is presented. It is shown that the period of this sequence is significantly increased compared to that of the sequence generated by the most commonly used maximal length shift register scheme.
Publication Date: Feb 01, 1990
Document ID:
19900039647
(Acquired Nov 28, 1995)
Accession Number: 90A26702
Subject Category: COMMUNICATIONS AND RADAR
Document Type: Journal Article
Publication Information: IEEE Transactions on Computers; p. 258-262; (ISSN 0018-9340); 39
Publisher Information: United States
Financial Sponsor: NASA; United States
Organization Source: Jet Propulsion Lab., California Inst. of Tech.; Pasadena, CA, United States
Academia Sinica; Beijing, China
Description: 5p; In English
Distribution Limits: Unclassified; Publicly available; Unlimited
Rights: Copyright
NASA Terms: ERROR CORRECTING CODES; EXPONENTS; PIPELINING (COMPUTERS); RANDOM NUMBERS; VERY LARGE SCALE INTEGRATION; ALGORITHMS; DECODING; FLOW CHARTS; MULTIPLICATION
Imprint And Other Notes: IEEE Transactions on Computers (ISSN 0018-9340), vol. 39, Feb. 1990, p. 258-262.
Availability Source: Other Sources
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