Box schemes and their implementation on the iPSC/860Research on algoriths for efficiently solving fluid flow problems on massively parallel computers is continued in the present paper. Attention is given to the implementation of a box scheme on the iPSC/860, a massively parallel computer with a peak speed of 10 Gflops and a memory of 128 Mwords. A domain decomposition approach to parallelism is used.
Document ID
19910056166
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Chattot, J. J. (California, University Davis, United States)
Merriam, M. L. (NASA Ames Research Center Moffett Field, CA, United States)