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A Markov model reduction technique for fault tolerant processor reliability analysisA fault tolerant processor (FTP) plays a key role in many high performance, safety-critical control system applications. Realistic modeling of an FTP is crucial to gaining a high degree of confidence in the reliability and safety analysis of such a system. While fidelity is clearly a major consideration, a practical model must also be kept to a moderate size to allow its incorporation into the overall system model. This paper presents a systematic reduction technique that starts from a complex, detailed model of a triple, redundant FTP and produces a low order approximation of very high accuracy. The existence of two distinct time scales represents the key to the success of the technique. No eigenvalue solution or coordinate transformation are needed. The reduced model captures all the important features of the detailed model, is amenable to an analytical solution and provides insight into the reconfiguration behavior of an FTP.
Document ID
19920035023
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Schor, Andrei L.
(Draper (Charles Stark) Lab., Inc. Cambridge, MA, United States)
Rosch, Gene
(Charles Stark Draper Laboratory, Inc. Cambridge, MA, United States)
Date Acquired
August 15, 2013
Publication Date
January 1, 1991
Subject Category
Computer Operations And Hardware
Report/Patent Number
AIAA PAPER 91-3791
Meeting Information
Meeting: AIAA Computing in Aerospace Conference
Location: Baltimore, MD
Country: United States
Start Date: October 21, 1991
End Date: October 24, 1991
Accession Number
92A17647
Funding Number(s)
CONTRACT_GRANT: NAS1-18565
Distribution Limits
Public
Copyright
Other

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