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Analog parallel processor hardware for high speed pattern recognitionA VLSI-based analog processor for fully parallel, associative, high-speed pattern matching is reported. The processor consists of two main components: an analog memory matrix for storage of a library of patterns, and a winner-take-all (WTA) circuit for selection of the stored pattern that best matches an input pattern. An inner product is generated between the input vector and each of the stored memories. The resulting values are applied to a WTA network for determination of the closest match. Patterns with up to 22 percent overlap are successfully classified with a WTA settling time of less than 10 microsec. Applications such as star pattern recognition and mineral classification with bounded overlap patterns have been successfully demonstrated. This architecture has a potential for an overall pattern matching speed in excess of 10 exp 9 bits per second for a large memory.
Document ID
19920059576
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Daud, T.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Tawel, R.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Langenbacher, H.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Eberhardt, S. P.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Thakoor, A. P.
(JPL Pasadena, CA, United States)
Date Acquired
August 15, 2013
Publication Date
January 1, 1990
Subject Category
Computer Operations And Hardware
Meeting Information
Meeting: Visual Communications and Image Processing ''90
Location: Lausanne
Country: Switzerland
Start Date: October 1, 1990
End Date: October 4, 1990
Accession Number
92A42200
Distribution Limits
Public
Copyright
Other

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