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Compensated digital readout familyISC has completed test on an IC which has 32 channels of amplifiers, low pass anti-aliasing filters, 13-bit analog-to-digital (A/D) converters with non-uniformity correction per channel and a digital multiplexer. The single slope class of A/D conversion is described, as are the unique variations required for incorporation of this technique for use with on-focal plane detector readout electronics. This paper describes the architecture used to implement the digital on-focal plane signal processing functions. Results from measured data on a test IC are presented for a circuit containing these functions operating at a sensor frame rate of 1000 hertz.
Document ID
19930049158
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Ludwig, David E.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Skow, Michael
(Irvine Sensors Corp. Costa Mesa, CA, United States)
Date Acquired
August 16, 2013
Publication Date
January 1, 1991
Publication Information
Publication: In: Infrared sensors: Detectors, electronics, and signal processing; Proceedings of the Meeting, San Diego, CA, July 24-26, 1991 (A93-33153 12-35)
Publisher: Society of Photo-Optical Instrumentation Engineers
Subject Category
Electronics And Electrical Engineering
Accession Number
93A33155
Funding Number(s)
CONTRACT_GRANT: DASG60-87-C-0051
CONTRACT_GRANT: NAS7-1008
CONTRACT_GRANT: NAS7-1065
CONTRACT_GRANT: DASG60-88-C-0059
Distribution Limits
Public
Copyright
Other

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