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High-efficiency high-gain monolithic heterostructure FET amplifier at 31 GHzA three-stage heterostructure FET monolithic amplifier has achieved a power-added efficiency of 36 percent with 200 mW output and 18 dB gain at 31 GHz. At a higher drain voltage, the output power increases to 280 mW (with 17.5 dB gain and 31 percent PAE) at a power density of 0.7 W/mm. The MMIC chip measures 2.63 x 1.35 sq mm and requires only a single drain bias and a single gate bias.
Document ID
19930053424
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
Authors
Tserng, H. Q.
(NASA Lewis Research Center Cleveland, OH, United States)
Saunier, P.
(NASA Lewis Research Center Cleveland, OH, United States)
Kao, Y.-C.
(Texas Instruments Central Research Labs. Dallas, United States)
Date Acquired
August 16, 2013
Publication Date
February 4, 1993
Publication Information
Publication: Electronics Letters
Volume: 29
Issue: 3
ISSN: 0013-5194
Subject Category
Electronics And Electrical Engineering
Accession Number
93A37421
Funding Number(s)
CONTRACT_GRANT: NAS3-24239
Distribution Limits
Public
Copyright
Other

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