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Record Details

Record 24 of 14333
Associative Pattern Recognition In Analog VLSI Circuits
Author and Affiliation:
Tawel, Raoul(Caltech)
Abstract: Winner-take-all circuit selects best-match stored pattern. Prototype cascadable very-large-scale integrated (VLSI) circuit chips built and tested to demonstrate concept of electronic associative pattern recognition. Based on low-power, sub-threshold analog complementary oxide/semiconductor (CMOS) VLSI circuitry, each chip can store 128 sets (vectors) of 16 analog values (vector components), vectors representing known patterns as diverse as spectra, histograms, graphs, or brightnesses of pixels in images. Chips exploit parallel nature of vector quantization architecture to implement highly parallel processing in relatively simple computational cells. Through collective action, cells classify input pattern in fraction of microsecond while consuming power of few microwatts.
Publication Date: Jul 01, 1995
Document ID:
19950065501
(Acquired Dec 28, 1995)
Accession Number: 95B10342
Subject Category: ELECTRONIC COMPONENTS AND CIRCUITS
Report/Patent Number: NPO-19082
Document Type: NASA Tech Brief
Publication Information: NASA Tech Briefs; p. P. 13a; (ISSN 0145-319X); 19; 7
Publisher Information: United States
Financial Sponsor: NASA; United States
Organization Source: Jet Propulsion Lab., California Inst. of Tech.; Pasadena, CA, United States
Description: In English
Distribution Limits: Unclassified; Publicly available; Unlimited
Rights: No Copyright
NASA Terms: ANALOG CIRCUITS; IMAGE ANALYSIS; INTEGRATED CIRCUITS; PATTERN RECOGNITION; VERY LARGE SCALE INTEGRATION
Availability Source: National Technology Transfer Center (NTTC), Wheeling, WV
Availability Notes: Additional information available through: National Technology Transfer Center (NTTC), Wheeling, WV 26003, (Tel: 1-800-678-6882).
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