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Computational Modeling in Plasma Processing for 300 mm WafersMigration toward 300 mm wafer size has been initiated recently due to process economics and to meet future demands for integrated circuits. A major issue facing the semiconductor community at this juncture is development of suitable processing equipment, for example, plasma processing reactors that can accomodate 300 mm wafers. In this Invited Talk, scaling of reactors will be discussed with the aid of computational fluid dynamics results. We have undertaken reactor simulations using CFD with reactor geometry, pressure, and precursor flow rates as parameters in a systematic investigation. These simulations provide guidelines for scaling up in reactor design.
Document ID
20020039860
Document Type
Conference Paper
Authors
Meyyappan, Meyya (NASA Ames Research Center Moffett Field, CA United States)
Arnold, James O.
Date Acquired
August 20, 2013
Publication Date
January 1, 1997
Subject Category
Electronics and Electrical Engineering
Meeting Information
3rd International Conference on Reactive Plasmas(Nara)
Funding Number(s)
PROJECT: RTOP 199-61-99
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.