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On the Floating Point Performance of the i860 MicroprocessorThe i860 microprocessor is a pipelined processor that can deliver two double precision floating point results every clock. It is being used in the Touchstone project to develop a teraflop computer by the year 2000. With such high computational capabilities it was expected that memory bandwidth would limit performance on many kernels. Measured performance of three kernels showed performance is less than what memory bandwidth limitations would predict. This paper develops a model that explains the discrepancy in terms of memory latencies and points to some problems involved in moving data from memory to the arithmetic pipelines.
Document ID
20020052017
Acquisition Source
Ames Research Center
Document Type
Preprint (Draft being sent to journal)
Authors
Lee, King
(NASA Ames Research Center Moffett Field, CA United States)
Kutler, Paul
Date Acquired
August 20, 2013
Publication Date
January 1, 1997
Subject Category
Computer Operations And Hardware
Report/Patent Number
RNR-90-019
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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