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Speed challenge: a case for hardware implementation in soft-computingFor over a decade, JPL has been actively involved in soft computing research on theory, architecture, applications, and electronics hardware. The driving force in all our research activities, in addition to the potential enabling technology promise, has been creation of a niche that imparts orders of magnitude speed advantage by implementation in parallel processing hardware with algorithms made especially suitable for hardware implementation. We review our work on neural networks, fuzzy logic, and evolvable hardware with selected application examples requiring real time response capabilities.
Document ID
20060033430
Document Type
Conference Paper
External Source(s)
Authors
Daud, T.
Stoica, A.
Duong, T.
Keymeulen, D.
Zebulum, R.
Thomas, T.
Thakoor, A.
Date Acquired
August 23, 2013
Publication Date
September 12, 2000
Subject Category
Cybernetics, Artificial Intelligence and Robotics
Distribution Limits
Public
Copyright
Other
Keywords
neural networks fuzzy logic evolvable hardware soft computing parallel processor