NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Back to Results
Single-event upset in highly scaled commercial silicon-on-insulator PowerPc microprocessorsSingle event upset effects from heavy ions are measured for Motorola and IBM silicon-on-insulator (SOI) microprocessors with different feature sizes, and core voltages. The results are compared with results for similar devices with build substrates. The cross sections of the SOI processors are lower than their bulk counterparts, but the threshold is about the same, even though the charge collections depth is more than an order of magnitude smaller in the SOI devices. The scaling of the cross section with reduction of feature size and core voltage dependence for SOI microprocessors discussed.
Document ID
20060043759
Acquisition Source
Jet Propulsion Laboratory
Document Type
Conference Paper
External Source(s)
Authors
Irom, Farokh
Farmanesh, Farhad H.
Date Acquired
August 23, 2013
Publication Date
September 22, 2004
Meeting Information
Meeting: IEEE Radiation Effects on Components and Systems
Location: Madrid
Country: Spain
Start Date: September 22, 2004
End Date: September 24, 2004
Distribution Limits
Public
Copyright
Other
Keywords
single event upset (SEU)
microprocessors

Available Downloads

There are no available downloads for this record.
No Preview Available