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Closing the Gap Between Specification and Programming: VDM++ and SCALAWe argue that a modern programming language such as Scala offers a level of succinctness, which makes it suitable for program and systems specification as well as for high-level programming. We illustrate this by comparing the language with the Vdm++ specification language. The comparison also identifies areas where Scala perhaps could be improved, inspired by Vdm++. We furthermore illustrate Scala's potential as a specification language by augmenting it with a combination of parameterized state machines and temporal logic, defined as a library, thereby forming an expressive but simple runtime verification framework.
Document ID
20130009360
Acquisition Source
Jet Propulsion Laboratory
Document Type
Conference Paper
External Source(s)
Authors
Havelund, Klaus
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
August 27, 2013
Publication Date
December 20, 2011
Subject Category
Computer Programming And Software
Meeting Information
Meeting: Howard-60: Higher Order Workshop on Automated Runtime Verification and Debugging
Location: Manchester
Country: United Kingdom
Start Date: December 20, 2011
Distribution Limits
Public
Copyright
Other
Keywords
programming
specifications
language design

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