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Low-Power Architectures for Large Radio Astronomy CorrelatorsThe architecture of a cross-correlator for a synthesis radio telescope with N greater than 1000 antennas is studied with the objective of minimizing power consumption. It is found that the optimum architecture minimizes memory operations, and this implies preference for a matrix structure over a pipeline structure and avoiding the use of memory banks as accumulation registers when sharing multiply-accumulators among baselines. A straw-man design for N = 2000 and bandwidth of 1 GHz, based on ASICs fabricated in a 90 nm CMOS process, is presented. The cross-correlator proper (excluding per-antenna processing) is estimated to consume less than 35 kW.
Document ID
20150006934
Document Type
Conference Paper
External Source(s)
Authors
D'Addario, Larry R. (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
April 29, 2015
Publication Date
August 13, 2011
Subject Category
Astronomy
Meeting Information
2011 URSI General Assembly and Scientific Symposium(Istanbul)
Distribution Limits
Public
Copyright
Other
Keywords
signal processing
radio telescope
correlators