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Performance of Low-Density Parity-Check Coded ModulationThis paper reports the simulated performance of each of the nine accumulate-repeat-4-jagged-accumulate (AR4JA) low-density parity-check (LDPC) codes [3] when used in conjunction with binary phase-shift-keying (BPSK), quadrature PSK (QPSK), 8-PSK, 16-ary amplitude PSK (16- APSK), and 32-APSK.We also report the performance under various mappings of bits to modulation symbols, 16-APSK and 32-APSK ring scalings, log-likelihood ratio (LLR) approximations, and decoder variations. One of the simple and well-performing LLR approximations can be expressed in a general equation that applies to all of the modulation types.
Document ID
20150008472
Acquisition Source
Jet Propulsion Laboratory
Document Type
Conference Paper
External Source(s)
hdl:2014/44689
Authors
Hamkins, Jon (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
May 20, 2015
Publication Date
March 6, 2010
Subject Category
Computer Programming And Software
Computer Systems
Meeting Information
Meeting: IEEE Aerospace Conference
Location: Big Sky, MT
Country: United States
Start Date: March 6, 2010
End Date: March 13, 2010
Sponsors: Institute of Electrical and Electronics Engineers
Distribution Limits
Public
Copyright
Other

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