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Radiation Hardened 10BASE-T Ethernet Physical Layer (PHY)Embodiments may provide a radiation hardened 10BASE-T Ethernet interface circuit suitable for space flight and in compliance with the IEEE 802.3 standard for Ethernet. The various embodiments may provide a 10BASE-T Ethernet interface circuit, comprising a field programmable gate array (FPGA), a transmitter circuit connected to the FPGA, a receiver circuit connected to the FPGA, and a transformer connected to the transmitter circuit and the receiver circuit. In the various embodiments, the FPGA, transmitter circuit, receiver circuit, and transformer may be radiation hardened.
Document ID
20170006152
Acquisition Source
Headquarters
Document Type
Other - Patent
Authors
Lin, Michael R.
Petrick, David J.
Ballou, Kevin M.
Espinosa, Daniel C.
James, Edward F.
Kliesner, Matthew A.
Date Acquired
July 6, 2017
Publication Date
June 13, 2017
Subject Category
Computer Programming And Software
Electronics And Electrical Engineering
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
Patent
US-Patent-9,680,527
Patent Application
US-Patent-Appl-SN-14/855,992
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