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ASIC/FPGA Trust Assessment FrameworkNASA Electronic Parts and Packaging (NEPP) is developing a process to be employed in critical applications. The framework assesses levels of Trust and assurance in microelectronic systems. The process is being created with participation from a variety of organizations. We present a synopsis of the framework that includes contributions from The Aerospace Corporation.
Document ID
20180001254
Acquisition Source
Goddard Space Flight Center
Document Type
Presentation
External Source(s)
https://nepp.nasa.gov/
Authors
Berg, Melanie (Artic Slope Regional Corp. (ASRC) Federal Greenbelt, MD, United States)
Date Acquired
February 15, 2018
Publication Date
February 7, 2018
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
GSFC-E-DAA-TN52442
GSFC-E-DAA-TN65833
Meeting Information
Meeting: Microelectronics Reliability and Qualification Working (MRQW) Meeting
Location: El Segundo, CA
Country: United States
Start Date: February 6, 2018
End Date: February 8, 2018
Sponsors: Aerospace Corp.
Funding Number(s)
CONTRACT_GRANT: NNG13CR48C
Distribution Limits
Public
Copyright
Portions of document may include copyright protected material.
Keywords
Application specific integrated circuit (ASIC)
Security
Trust
Field programmable gate array (FPGA)
Assurance

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