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An 18 bit 50 kHz ADC for low earth orbitA fourth order incremental analog to digital converter (ADC) is proposed which performs 18 bit conversions at a 50 kHz rate on sampled and held data. A new self calibration scheme is presented which eases the matching requirements of capacitors, and the performance of the operational amplifiers in the ADC by changing coefficients in the digital postprocessing.
Document ID
19940017229
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Thelen, Donald C.
(Idaho Univ. Moscow, ID, United States)
Date Acquired
September 6, 2013
Publication Date
January 1, 1992
Publication Information
Publication: The 1992 4th NASA SERC Symposium on VLSI Design
Subject Category
Computer Operations And Hardware
Accession Number
94N21702
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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