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NASA SERC digital correlator projectsInterest in custom digital correlator processors is growing, in both the radio astronomy and earth sensing communities, as scientists realize that VLSI technology is available to them. This paper presents three digital correlator projects currently underway at the NASA SERC for VLSI Systems Design. The projects are as follows: a 60MHz chip for the ESTAR satellite; a 100MHz, 1024 channel autocorrelator; and a 64 MHz, VLSI system consisting of 8 32- channel complex crosscorrelators including phase rotators.
Document ID
19940017235
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Canaris, John
(Idaho Univ. Moscow, ID, United States)
Date Acquired
September 6, 2013
Publication Date
January 1, 1992
Publication Information
Publication: The 1992 4th NASA SERC Symposium on VLSI Design
Subject Category
Computer Operations And Hardware
Accession Number
94N21708
Funding Number(s)
CONTRACT_GRANT: NAGW-1406
CONTRACT_GRANT: NAG5-1635
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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