NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Back to Results
A high speed CMOS A/D converterThis paper presents a high speed analog-to-digital (A/D) converter. The converter is a 7 bit flash converter with one half LSB accuracy. Typical parts will function at approximately 200 MHz. The converter uses a novel comparator circuit that is shown to out perform more traditional comparators, and thus increases the speed of the converter. The comparator is a clocked, precharged circuit that offers very fast operation with a minimal offset voltage (2 mv). The converter was designed using a standard 1 micron digital CMOS process and is 2,244 microns by 3,972 microns.
Document ID
19940017253
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Wiseman, Don R.
(New Mexico Univ. Albuquerque, NM, United States)
Whitaker, Sterling R.
(New Mexico Univ. Albuquerque, NM, United States)
Date Acquired
September 6, 2013
Publication Date
January 1, 1992
Publication Information
Publication: Idaho Univ., The 1992 4th NASA SERC Symposium on VLSI Design
Subject Category
Electronics And Electrical Engineering
Accession Number
94N21726
Funding Number(s)
CONTRACT_GRANT: NAGW-1406
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
No Preview Available