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Multifunctional Logic Gate Controlled by TemperatureA complementary metal oxide/semiconductor (CMOS) electronic circuit has been designed to function as a NAND gate at a temperature between 0 and 80 deg C and as a NOR gate at temperatures from 120 to 200 C. In the intermediate temperature range of 80 to 120 C, this circuit is expected to perform a function intermediate between NAND and NOR with degraded noise margin. The process of designing the circuit and the planned fabrication and testing of the circuit are parts of demonstration of polymorphic electronics a technological discipline that emphasizes designing the same circuit to perform different analog and/or digital functions under different conditions. In this case, the different conditions are different temperatures.
Document ID
20110015039
Acquisition Source
Jet Propulsion Laboratory
Document Type
Other - NASA Tech Brief
Authors
Stoica, Adrian
(California Inst. of Tech. Pasadena, CA, United States)
Zebulum, Ricardo
(California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
August 25, 2013
Publication Date
July 1, 2005
Publication Information
Publication: NASA Tech Briefs, July 2005
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
NPO-30795
Distribution Limits
Public
Copyright
Public Use Permitted.
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