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NASA Space Engineering Research Center for VLSI systems designThis annual review reports the center's activities and findings on very large scale integration (VLSI) systems design for 1990, including project status, financial support, publications, the NASA Space Engineering Research Center (SERC) Symposium on VLSI Design, research results, and outreach programs. Processor chips completed or under development are listed. Research results summarized include a design technique to harden complementary metal oxide semiconductors (CMOS) memory circuits against single event upset (SEU); improved circuit design procedures; and advances in computer aided design (CAD), communications, computer architectures, and reliability design. Also described is a high school teacher program that exposes teachers to the fundamentals of digital logic design.
Document ID
19940009852
Document Type
Contractor Report (CR)
Date Acquired
September 6, 2013
Publication Date
January 1, 1991
Subject Category
ELECTRONICS AND ELECTRICAL ENGINEERING
Report/Patent Number
NAS 1.26:194035
NASA-CR-194035
Funding Number(s)
CONTRACT_GRANT: NAGW-1406
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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