Error Propagation Analysis in the SAE Architecture Analysis and Design Language (AADL) and the EDICT Tool FrameworkThis report documents the capabilities of the EDICT tools for error modeling and error propagation analysis when operating with models defined in the Architecture Analysis & Design Language (AADL). We discuss our experience using the EDICT error analysis capabilities on a model of the Scalable Processor-Independent Design for Enhanced Reliability (SPIDER) architecture that uses the Reliable Optical Bus (ROBUS). Based on these experiences we draw some initial conclusions about model based design techniques for error modeling and analysis of highly reliable computing architectures.
Document ID
20110011615
Acquisition Source
Langley Research Center
Document Type
Contractor Report (CR)
Authors
LaValley, Brian W. (WW Technology Group Ellicott City, MD, United States)
Little, Phillip D. (WW Technology Group Ellicott City, MD, United States)
Walter, Chris J. (WW Technology Group Ellicott City, MD, United States)