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Input-output, expandable-parity networkLarge-scale integrated circuit generates and checks parity of four eight-bit registers. In addition, circuit will indicate by output signal whether parity error exists. Circuit can also generate or check parity of words up to 32 bits. This is done by making appropriate internal wiring connections on the large-scale integrated chip.
Document ID
19730000479
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Mckevitt, J. F., III
(Hughes Aircraft Co.)
Date Acquired
August 7, 2013
Publication Date
March 1, 1974
Subject Category
Electronic Systems
Report/Patent Number
HN-10728
Report Number: HN-10728
Accession Number
73B10479
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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