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Optimal space communications techniquesThe design, development, and analysis are reported of a digital phase-locked loop (DPLL) for FM demodulation and threshold extension. One of the features of the developed DPLL is its synchronous, real time operation. The sampling frequency is constant and all the required arithmetic and logic operations are performed within one sampling period, generating an output sequence which is converted to analog form and filtered. An equation relating the sampling frequency to the carrier frequency must be satisfied to guarantee proper DPLL operation. The synchronous operation enables a time-shared operation of one DPLL to demodulate several FM signals simultaneously. In order to obtain information about the DPLL performance at low input signal-to-noise ratios, a model of an input noise spike was introduced, and the DPLL equation was solved using a digital computer. The spike model was successful in finding a second order DPLL which yielded a five db threshold extension beyond that of a first order DPLL.
Document ID
19740004724
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Schilling, D. L.
(City Coll. of the City Univ. of New York NY, United States)
Date Acquired
September 3, 2013
Publication Date
July 21, 1973
Subject Category
Communications
Report/Patent Number
NASA-CR-132881
Report Number: NASA-CR-132881
Accession Number
74N12837
Funding Number(s)
CONTRACT_GRANT: NGR-33-013-077
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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