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Automated Array Assembly, Phase 2The solar cell module process development activities in the areas of surface preparation are presented. The process step development was carried out on texture etching including the evolution of a conceptual process model for the texturing process; plasma etching; and diffusion studies that focused on doped polymer diffusion sources. Cell processing was carried out to test process steps and a simplified diode solar cell process was developed. Cell processing was also run to fabricate square cells to populate sample minimodules. Module fabrication featured the demonstration of a porcelainized steel glass structure that should exceed the 20 year life goal of the low cost silicon array program. High efficiency cell development was carried out in the development of the tandem junction cell and a modification of the TJC called the front surface field cell. Cell efficiencies in excess of 16 percent at AM1 have been attained with only modest fill factors. The transistor-like model was proposed that fits the cell performance and provides a guideline for future improvements in cell performance.
Document ID
19790015341
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Carbajal, B. G.
(Texas Instruments, Inc. Dallas, TX, United States)
Date Acquired
September 4, 2013
Publication Date
February 1, 1979
Subject Category
Energy Production And Conversion
Report/Patent Number
NASA-CR-158599
TI-03-79-15
DOE/JPL-954881-79/4
JPL-9950-48
Report Number: NASA-CR-158599
Report Number: TI-03-79-15
Report Number: DOE/JPL-954881-79/4
Report Number: JPL-9950-48
Accession Number
79N23512
Funding Number(s)
CONTRACT_GRANT: JPL-954881
CONTRACT_GRANT: NAS7-100
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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