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Silicon-gate CMOS/SOS processingMajor silicon-gate CMOS/SOS processes are described. Sapphire substrate preparation is also discussed, as well as the following process variations: (1) the double epi process; and (2) ion implantation.
Document ID
19790024293
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Ramondetta, P. (RCA Government Communications Systems Camden, NJ, United States)
Date Acquired
August 9, 2013
Publication Date
March 1, 1979
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
NASA-CR-150319
Report Number: NASA-CR-150319
Accession Number
79N32464
Funding Number(s)
CONTRACT_GRANT: NAS8-31325
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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