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Fault-tolerant computer studyA set of building block circuits is described which can be used with commercially available microprocessors and memories to implement fault tolerant distributed computer systems. Each building block circuit is intended for VLSI implementation as a single chip. Several building blocks and associated processor and memory chips form a self checking computer module with self contained input output and interfaces to redundant communications buses. Fault tolerance is achieved by connecting self checking computer modules into a redundant network in which backup buses and computer modules are provided to circumvent failures. The requirements and design methodology which led to the definition of the building block circuits are discussed.
Document ID
19810010149
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Rennels, D. A.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Avizienis, A. A.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Ercegovac, M. D.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
September 4, 2013
Publication Date
February 1, 1981
Subject Category
Computer Operations And Hardware
Report/Patent Number
JPL-PUB-80-73
NASA-CR-163986
Report Number: JPL-PUB-80-73
Report Number: NASA-CR-163986
Accession Number
81N18675
Funding Number(s)
CONTRACT_GRANT: NAS7-100
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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