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Double-injection, deep-impurity switch developmentThe overall objective of this program was the development of device design and process techniques for the fabrication of a double-injection, deep-impurity (DI) sup 2 silicon switch that operates in the 2-10 kV range with conduction current values of 5 A at 2 kV and 1 A at 10 kV. Other major specifications include a holding voltage of 10 V with no gate current, 10 microsec switching time, and power dissipation of 50 W at 75 C. It was decided to concentrate on the lateral circular devices in order to optimize the gold diffusion. This resulted in devices that are much better switches (approx.1 micro sec switching time), and in a gold diffusion process that is much more controllable than those previously developed. Some results with injection-gated devices were also obtained. The current conduction for V less than VT was analyzed and seen to agree, for the most part, with Lampert's theory. Various sections of this report describe the device designs, wafer-processing techniques, and various measurements which include ac and dc characteristics and four-point probe.
Document ID
19860020601
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Whitson, D. W.
(Westinghouse Research and Development Center Pittsburgh, PA, United States)
Date Acquired
September 5, 2013
Publication Date
March 28, 1985
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
NASA-CR-174936
WRDC-85-9F4-DIDIS-R1
NAS 1.26:174936
Report Number: NASA-CR-174936
Report Number: WRDC-85-9F4-DIDIS-R1
Report Number: NAS 1.26:174936
Accession Number
86N30073
Funding Number(s)
CONTRACT_GRANT: NAS3-23882
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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