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An alternative design for a sparse distributed memoryA new design for a Sparse Distributed Memory, called the selected-coordinate design, is described. As in the original design, there are a large number of memory locations, each of which may be activated by many different addresses (binary vectors) in a very large address space. Each memory location is defined by specifying ten selected coordinates (bit positions in the address vectors) and a set of corresponding assigned values, consisting of one bit for each selected coordinate. A memory location is activated by an address if, for all ten of the locations's selected coordinates, the corresponding bits in the address vector match the respective assigned value bits, regardless of the other bits in the address vector. Some comparative memory capacity and signal-to-noise ratio estimates for the both the new and original designs are given. A few possible hardware embodiments of the new design are described.
Document ID
19920001073
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Jaeckel, Louis A.
(Research Inst. for Advanced Computer Science Moffett Field, CA, United States)
Date Acquired
September 6, 2013
Publication Date
July 1, 1989
Subject Category
Computer Operations And Hardware
Report/Patent Number
NASA-CR-188847
RIACS-TR-89-28
NAS 1.26:188847
Accession Number
92N10291
Funding Number(s)
CONTRACT_GRANT: NCC2-408
CONTRACT_GRANT: NCC2-387
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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