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Implementation and performance of the Magellan digital correlator subsystemThe Magellan synthetic aperture radar (SAR) produces Venus surface images from data collected by the SAR carried on board the Magellan spacecraft. The core of the primary Magellan SAR processor is the digital correlator subsystem (DCS). The pipeline DSC architecture enables the Magellan primary SAR processor (PSP) to achieve real-time data processing capability. The implementation and performance of the DSC are described. Hardware (H/W) constraints that influenced the processing algorithm design are highlighted.
Document ID
19930063911
Document Type
Conference Paper
Authors
Chen, M. (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Jin, M. (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Leung, K. (JPL Pasadena, CA, United States)
Date Acquired
August 16, 2013
Publication Date
January 1, 1992
Publication Information
Publication: In: IGARSS '92; Proceedings of the 12th Annual International Geoscience and Remote Sensing Symposium, Houston, TX, May 26-29, 1992. Vol. 2 (A93-47551 20-43)
Subject Category
LUNAR AND PLANETARY EXPLORATION
Distribution Limits
Public
Copyright
Other

Related Records

IDRelationTitle19930063554Analytic PrimaryIGARSS '92; Proceedings of the 12th Annual International Geoscience and Remote Sensing Symposium, Houston, TX, May 26-29, 1992. Vols. 1 & 2