NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Back to Results
Low power signal processing research at StanfordThis paper gives an overview of the research being conducted at Stanford University's Space, Telecommunications, and Radioscience Laboratory in the area of low energy computation. It discusses the work we are doing in large scale digital VLSI neural networks, interleaved processor and pipelined memory architectures, energy estimation and optimization, multichip module packaging, and low voltage digital logic.
Document ID
19940013878
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Burr, J.
(Stanford Univ. CA, United States)
Williamson, P. R.
(Stanford Univ. CA, United States)
Peterson, A.
(Stanford Univ. CA, United States)
Date Acquired
September 6, 2013
Publication Date
January 1, 1991
Publication Information
Publication: Idaho Univ., The 1991 3rd NASA Symposium on VLSI Design
Subject Category
Communications And Radar
Accession Number
94N18351
Funding Number(s)
CONTRACT_GRANT: NAGW-419
CONTRACT_GRANT: NAGW-1910
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
No Preview Available