NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Collections About News Help Login
Back to Results
FIBER-TEX 1992: The Sixth Conference on Advanced Engineering Fibers and Textile Structures for CompositesThe FIBER-TEX 1992 proceedings contain the papers presented at the conference held on 27-29 Oct. 1992 at Drexel University. The conference was held to create a forum to encourage an interrelationship of the various disciplines involved in the fabrication of materials, the types of equipment, and the processes used in the production of advanced composite structures. Topics discussed were advanced engineering fibers, textile processes and structures, structural fabric production, mechanics and characteristics of woven composites, and the latest requirements for the use of textiles in the production of composite materials and structures as related to global activities focused on textile structural composites.
Document ID
19940012372
Acquisition Source
Legacy CDMS
Document Type
Conference Proceedings
Authors
Buckley, John D. (NASA Langley Research Center Hampton, VA, United States)
Date Acquired
September 6, 2013
Publication Date
August 1, 1993
Subject Category
Composite Materials
Report/Patent Number
NASA-CP-3211
NAS 1.55:3211
L-17266
Accession Number
94N16845
Funding Number(s)
PROJECT: RTOP 505-63-50-05
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

Related Records

IDRelationTitle19940013865WorkExperience with custom processors in space flight applications19940013866WorkNew dynamic FET logic and serial memory circuits for VLSI GaAs technology19940013867WorkAutomated ILA design for synchronous sequential circuits19940013868WorkSingle phase dynamic CMOS PLA using charge sharing technique19940013869WorkAn SEU immune logic family19940013870WorkCellular logic array for computation of squares19940013871WorkFault tolerant sequential circuits using sequence invariant state machines19940013872WorkVLSI architectures for geometrical mapping problems in high-definition image processing19940013873WorkPerformance of defect-tolerant set-associative cache memories19940013874WorkSPROC: A multiple-processor DSP IC19940013875WorkAn extended Reed Solomon decoder design19940013876WorkAn improved distributed arithmetic architecture19940013877WorkAn analog retina model for detecting dim moving objects against a bright moving background19940013878WorkLow power signal processing research at Stanford19940013879WorkTechnology, design, simulation, and evaluation for SEP-hardened circuits19940013880WorkPulse-firing winner-take-all networks19940013881WorkTraining product unit neural networks with genetic algorithms19940013882WorkVLSI synthesis of digital application specific neural networks19940013883WorkMeasurement selection for parametric IC fault diagnosis19940013884WorkFuzzy control of magnetic bearings19940013885WorkDirect kinematics solution architectures for industrial robot manipulators: Bit-serial versus parallel19940013886WorkSimplified microprocessor design for VLSI control applications19940013887WorkA modified reconfigurable data path processor19940013888WorkSystolic array IC for genetic computation19940013889WorkHigh-performance multiprocessor architecture for a 3-D lattice gas model19940013890WorkVerification of VLSI designs19940013891WorkA new variable testability measure19940013892WorkControlling state explosion during automatic verification of delay-insensitive and delay-constrained VLSI systems using the POM verifier19940013893WorkFormal verification of an MMU and MMU cache19940013894WorkFormal hardware verification of digital circuits19940013895WorkHigh accuracy switched-current circuits using an improved dynamic mirror19940013896WorkA tunable CMOS constant current source19940013897WorkDC and small-signal physical models for the AlGaAs/GaAs high electron mobility transistor19940013898WorkFormal specification of a high speed CMOS correlator19940013899WorkA verification logic representation of indeterministic signal states19940013900WorkUltra low power CMOS technology19940013901WorkParallel optimization algorithms and their implementation in VLSI design19940013902WorkCanonical multi-valued input Reed-Muller trees and forms19940013903WorkAsynchronous sequential circuit design using pass transistor iterative logic arrays19940013904WorkPulse mode VLSI asynchronous circuits19940013905WorkImproved self arbitrated VLSI asynchronous circuits19940013906WorkA special purpose silicon compiler for designing supercomputing VLSI systems19940013907WorkA fast adaptive convex hull algorithm on two-dimensional processor arrays with a reconfigurable BUS system19940013908WorkVHDL simulation with access to transistor models
No Preview Available