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practical issues in implementing roving spares in vlsi systolic arraysIn this paper we address several unsolved problems in implementing roving spares as a methodology for on-line testing and reconfiguration of systolic arrays. An algorithm for distinguishing between permanent faults and intermittent/transient faults is proposed. A methodology for determining different parameter values for this algorithm is presented. Results characterizing an optimal switching structure are presented. A judicious partitioning of information (for distributed and central processing) allows design of simple switch controllers for implementing roving spares operation as well as reconfiguration in the presence of failures. Testability and self-checking capability is incorporated into these controllers using a few extra gates.
Document ID
19940016641
Document Type
Conference Paper
Authors
Bandekar, Rajendra
(University of Southern Illinois Carbondale, IL, United States)
Majumdar, Amitava
(University of Southern Illinois Carbondale, IL, United States)
Date Acquired
September 6, 2013
Publication Date
January 1, 1993
Publication Information
Publication: New Mexico Univ., The Fifth NASA Symposium on VLSI Design
Subject Category
ELECTRONICS AND ELECTRICAL ENGINEERING
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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