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Correctness properties for iterated hardware structuresIterated structures occur frequently in hardware. This paper describes properties required of mathematical relations that can be implemented iteratively and demonstrates the use of these properties on a generalized class of adders. This work provides a theoretical basis for the correct synthesis of iterated arithmetic structures.
Document ID
19940016651
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Windley, Phillip J.
(Brigham Young Univ. Provo, UT, United States)
Date Acquired
September 6, 2013
Publication Date
January 1, 1993
Publication Information
Publication: New Mexico Univ., The Fifth NASA Symposium on VLSI Design
Subject Category
Electronics And Electrical Engineering
Accession Number
94N21124
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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