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a cam-based lz data compression icA custom CMOS processor is introduced that implements the Data Compression Lempel-Ziv (DCLZ) standard, a variation of the LZ2 Algorithm. This component presently achieves a sustained compression and decompression rate of 10 megabytes/second by employing an on-chip content-addressable memory for string table storage.
Document ID
19940016656
Document Type
Conference Paper
Authors
Winters, K.
(Idaho Univ. Moscow, ID, United States)
Bode, R.
(Advanced Hardware Architectures Moscow, ID., United States)
Schneider, E.
(Video Lottery Consultants, Inc. Bozeman, MT., United States)
Date Acquired
September 6, 2013
Publication Date
January 1, 1993
Publication Information
Publication: New Mexico Univ., The Fifth NASA Symposium on VLSI design
Subject Category
COMPUTER PROGRAMMING AND SOFTWARE
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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