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high-speed viterbi decoding with overlapping code sequencesThe Viterbi Algorithm for decoding convolutional codes and Trellis Coded Modulation is suited to VLSI implementation but contains a feedback loop which limits the speed of pipelined architecture. The feedback loop is circumvented by decoding independent sequences simultaneously, resulting in a 5-9 fold speed-up with a two-fold hardware expansion.
Document ID
19940016657
Document Type
Conference Paper
Authors
Ross, Michael D.
(New Mexico State Univ. Las Cruces, NM, United States)
Osborne, William P.
(New Mexico State Univ. Las Cruces, NM, United States)
Date Acquired
September 6, 2013
Publication Date
January 1, 1993
Publication Information
Publication: New Mexico Univ., The Fifth NASA Symposium on VLSI Design
Subject Category
COMPUTER PROGRAMMING AND SOFTWARE
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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