Influence of the Polysilicon Gate on the Random Dopant Induced Threshold Voltage Fluctuations in Sub 100 nm MOSFETS with Thin Gate Oxides

In this paper for the first time we study the influence of the polysilicon gate on the random dopant induced threshold voltage fluctuations in sub 100 nm MOSFETs with tunnelling gate oxides. This is done by using an efficient 3D 'atomistic' simulation technique described elsewhere. Devices with uniform channel doping and with low doped epitaxial channels have been investigated. The simulations reveale that the polysilicon gate is responsible for a substantial fraction of the threshold voltage fluctuations in both devices when the gate oxide is scaled to tunnelling thickness in the range of 1 - 2 nm.