NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Back to Results
VLSI Design of a Turbo DecoderA very-large-scale-integrated-circuit (VLSI) turbo decoder has been designed to serve as a compact, high-throughput, low-power, lightweight decoder core of a receiver in a data-communication system. In a typical contemplated application, such a decoder core would be part of a single integrated circuit that would include the rest of the receiver circuitry and possibly some or all of the transmitter circuitry, all designed and fabricated together according to an advanced communication-system-on-a-chip design concept. Turbo codes are forward-error-correction (FEC) codes. Relative to older FEC codes, turbo codes enable communication at lower signal-to-noise ratios and offer greater coding gain. In addition, turbo codes can be implemented by relatively simple hardware. Therefore, turbo codes have been adopted as standard for some advanced broadband communication systems.
Document ID
20100002244
Acquisition Source
Jet Propulsion Laboratory
Document Type
Other - NASA Tech Brief
Authors
Fang, Wai-Chi
(California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
August 25, 2013
Publication Date
June 1, 2007
Publication Information
Publication: NASA Tech Briefs, June 2007
Subject Category
Communications And Radar
Report/Patent Number
NPO-40392
Distribution Limits
Public
Copyright
Public Use Permitted.
No Preview Available