Enabling More than Moore: Accelerated Reliability Testing and Risk Analysis for Advanced Electronics PackagingFor five decades, the semiconductor industry has distinguished itself by the rapid pace of improvement in miniaturization of electronics products-Moore's Law. Now, scaling hits a brick wall, a paradigm shift. The industry roadmaps recognized the scaling limitation and project that packaging technologies will meet further miniaturization needs or ak.a "More than Moore". This paper presents packaging technology trends and accelerated reliability testing methods currently being practiced. Then, it presents industry status on key advanced electronic packages, factors affecting accelerated solder joint reliability of area array packages, and IPC/JEDEC/Mil specifications for characterizations of assemblies under accelerated thermal and mechanical loading. Finally, it presents an examples demonstrating how Accelerated Testing and Analysis have been effectively employed in the development of complex spacecraft thereby reducing risk. Quantitative assessments necessarily involve the mathematics of probability and statistics. In addition, accelerated tests need to be designed which consider the desired risk posture and schedule for particular project. Such assessments relieve risks without imposing additional costs. and constraints that are not value added for a particular mission. Furthermore, in the course of development of complex systems, variances and defects will inevitably present themselves and require a decision concerning their disposition, necessitating quantitative assessments. In summary, this paper presents a comprehensive view point, from technology to systems, including the benefits and impact of accelerated testing in offsetting risk.
Document ID
20140012437
Acquisition Source
Headquarters
Document Type
Conference Paper
Authors
Ghaffarian, Reza (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Evans, John W. (NASA Headquarters Washington, DC United States)
Date Acquired
September 22, 2014
Publication Date
September 10, 2014
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
HQ-STI-14-114Report Number: HQ-STI-14-114
Meeting Information
Meeting: 2014 Accelerated Stress Testing and Reliability Workshop