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Incorporating Probability Models of Complex Test Structures to Perform Technology Independent FPGA Single Event Upset AnalysisWe present SEU test and analysis of the Microsemi ProASIC3 FPGA. SEU Probability models are incorporated for device evaluation. Included is a comparison to the RTAXS FPGA illustrating the effectiveness of the overall testing methodology.
Document ID
20180001351
Acquisition Source
Goddard Space Flight Center
Document Type
Conference Paper
Authors
Berg, M. D. (MEI Technologies, Inc. Greenbelt, MD, United States)
Kim, H. S. (MEI Technologies, Inc. Greenbelt, MD, United States)
Friendlich, M. A. (MEI Technologies, Inc. Greenbelt, MD, United States)
Perez, C. E. (MEI Technologies, Inc. Greenbelt, MD, United States)
Seidlick, C. M. (MEI Technologies, Inc. Greenbelt, MD, United States)
LaBel, K. A. (NASA Goddard Space Flight Center Greenbelt, MD, United States)
Date Acquired
February 23, 2018
Publication Date
July 25, 2011
Subject Category
Statistics And Probability
Electronics And Electrical Engineering
Report/Patent Number
LEGNEW-OLDGSFC-GSFC-LN-1244
Report Number: LEGNEW-OLDGSFC-GSFC-LN-1244
Meeting Information
Meeting: IEEE Nuclear and Space Radiation Effects Conference (NSREC)
Location: Las Vegas, NV
Country: United States
Start Date: July 25, 2011
End Date: July 29, 2011
Sponsors: Institute of Electrical and Electronics Engineers
Funding Number(s)
CONTRACT_GRANT: IACRO #11-4395l
CONTRACT_GRANT: IACRP #10-49771
Distribution Limits
Public
Copyright
Public Use Permitted.

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