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Graphical Primer of NASA Glenn SiC JFET Integrated Circuit (IC) Version 12 LayoutThis presentation illustratively communicates integrated circuit (IC) mask design and layout rules for NASA GRC's upcoming prototype fabrication of SiC JFET IC Version 12.
Document ID
20190025716
Acquisition Source
Glenn Research Center
Document Type
Presentation
Authors
Neudeck, Philip (NASA Glenn Research Center Cleveland, OH, United States)
Spry, David (NASA Glenn Research Center Cleveland, OH, United States)
Date Acquired
June 5, 2019
Publication Date
April 1, 2019
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
GRC-E-DAA-TN68170
Funding Number(s)
WBS: 161682.04.03.01.18
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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