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Update on NEPP SEE FPGA Test and Analysis Featuring: The Lattice Avant TSMC 16 nm FinFet, The Xilinx TSMC 7nm Versal AIE Core, and Fluence to Failure Applied Methodologies
Document ID
20230009399
Acquisition Source
Goddard Space Flight Center
Document Type
Presentation
Authors
Melanie Berg
(Science Systems and Applications (United States) Lanham, Maryland, United States)
Date Acquired
June 23, 2023
Publication Date
July 21, 2023
Publication Information
Publication: Presentation for posting on public website
Publisher: NASA Electronic Parts and Packaging (NEPP) Program
URL: https://nepp.nasa.gov/
Subject Category
Electronics and Electrical Engineering
Meeting Information
Meeting: NCTS 47793-23 NEPP Electronics Technology Workshop (ETW)
Location: Greenbelt, MD
Country: US
Start Date: June 12, 2023
End Date: June 15, 2023
Sponsors: National Aeronautics and Space Administration
Funding Number(s)
WBS: 817091.40.31.51.04
CONTRACT_GRANT: 80GSFC18C0120
Distribution Limits
Public
Copyright
Portions of document may include copyright protected material.
Technical Review
Single Expert
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