A System-Agnostic Process to Design DC Series Arc Fault Detectors

Researchers are developing and testing electrified aircraft propulsion (EAP) systems which promise to stimulate new markets and missions, reduce operating costs, and increase efficiency. High-voltage direct current (HVDC) power systems are especially attractive for EAP because high voltages are required to minimize cable mass for desired operating power levels, and DC architectures enable both simpler control schemes and easier integration of sources and loads. On the other hand, electric arcs are more destructive at high powers and more likely to form at high voltages and altitudes. Furthermore, DC arcs formed by an interruption in a single electrical wire (series arcs) can resemble other spurious events such as switching noise. It is crucial both to the aircraft and to passenger safety to detect and isolate this species of arc fault, but doing so poses a non-trivial problem: DC arcs do not have a zero-crossing to facilitate their quenching, and classical overcurrent protection methods fail to detect them. This paper outlines a method of designing series arc fault detection algorithms by collecting arc test data, building a model of the power system, and optimizing arc detector parameters and structures to maximize accuracy and minimize latency as tested against the model. Interpretable machine learning optimization techniques and detectors were employed because they have a more assured and simpler path to aerospace flight certification than black box algorithms. Arcs were generated on a 28 VDC testbench, a circuit model and redundant arc detectors were designed, and one candidate detector solution was implemented in a field-programmable gate array (FPGA) and tested against live arcs.